Chip Thermal Design Now Requires Joint Optimization Across Voltage, Timing and Packaging

Heat is no longer a late-stage check on a chip design. As dies stack vertically and power rises, temperature interacts with voltage, timing, electrical resistance, materials and cooling. The practical consequence is a design problem that spans disciplines: teams need to evaluate these factors together, across workloads and packaging choices, while keeping performance and power within bounds.

That was the central thread in a discussion among Lang Lin of Synopsys, Jack Berg of Silvaco, Satish Radhakrishnan of Vinci, Chris Mueth of Keysight EDA and John Ferguson of Siemens EDA, held at the Design Automation Conference. Their account points to a gap in current workflows: engineers can run specialized analyses, but the full loop linking timing, thermal behavior and power integrity remains difficult to close.

Heat changes the electrical design

Voltage is one of the clearest examples of the trade-offs. Lowering it can reduce heat, but can also affect timing and performance. Running a chip faster may meet a target while increasing thermal pressure. Lin said designers need to test combinations of voltage and timing budgets, then iterate across timing, thermal analysis and power integrity. Different workloads also matter: a design that behaves acceptably in one operating pattern could encounter problems in another.

That loop is not yet handled by a single tool, Lin said. Engineers may have to work through place and route while coordinating separate timing, thermal and voltage analyses, then confirm that the design can still be closed. The challenge is less about finding one ideal setting than understanding how a choice in one domain shifts the constraints in others.

Temperature also changes the electrical properties being modeled. As current flows, a structure heats up and its resistance can change. Radhakrishnan described this as a transient, coupled problem: engineers need to track temperature over time and determine how the resulting resistance shift affects performance, current and power budgets. Cooling decisions feed back into the same loop. More cooling can make higher power acceptable, but that higher power produces more heat to remove.

This feedback makes isolated thermal checks less useful as designs become more complex. A model that assumes fixed resistance, power or operating conditions may miss interactions that matter during actual use. The design process needs to account for the changing state of the system, rather than treating heat as a separate output to inspect after electrical decisions are made.

Vertical integration raises the materials and cooling stakes

The panel expects vertical integration to advance, though the route will depend on application and cost. Stacking shortens some connections and can combine different technologies in a compact package, but it also makes heat removal harder. A die buried within a stack has fewer direct paths to a cooler surface, so materials, package structure and cooling methods become part of the performance equation.

Mueth pointed to stacked intercoolers with fluid circulation as one possible approach. Such structures would add manufacturing complexity and expense, making them more plausible for high-performance systems than for broad use. Radhakrishnan also mentioned cooled interposers, while noting that the industry is exploring tightly stacked 3D-IC designs with optical components entering from the side. He expects these configurations to begin in narrower applications where their benefits can justify the cost.

Heterogeneous integration offers another way to manage the trade-offs. Instead of forcing every function onto one type of die, designers can combine technologies suited to different tasks. Mueth argued that this can serve applications that need both high performance and small size. It adds coordination work, but it lets teams choose components around the requirements of each function.

The label “3D-IC” itself can cover different levels of integration. Berg noted that a package containing a stack of 16 high-bandwidth memory dies could already be described that way, depending on the definition. Further progress in vertical scaling will rely on materials expertise as well as thermal and mechanical engineering. Radhakrishnan cited hybrid bonding and potential advances in very small through-silicon vias as enablers for denser stacks.

There is no single cooling or packaging answer in the discussion. More elaborate options may support demanding workloads, but cost and manufacturing complexity will limit where they make sense. The useful question for a design team is which integration choice meets its performance and size needs without creating a thermal burden that the package cannot handle.

Engineering tools need to cross discipline boundaries

The panel sees a growing need for engineers to work across domains that have traditionally been handled by separate specialists. Lin described the older pattern: thermal engineers received data from semiconductor teams and returned recommendations. Today, a place-and-route engineer may be able to ask an AI agent to run a thermal analysis and report the maximum temperature, or T_max.

That kind of access could bring thermal considerations into design decisions earlier. It could also help engineers who are expert in one area run analyses that once required a dedicated multiphysics team. Mueth described two routes: AI assistance, or simulation tools designed so that people from one discipline can operate analyses spanning several. In either case, the aim is to make it practical to test interactions without requiring every engineer to become a specialist in every field.

Ease of use, however, cannot come at the cost of reliable results. Radhakrishnan stressed that an inaccurate AI output could lead a designer toward a faulty decision. The tool needs access to the right geometry, fast ways to run simulations, and the ability to connect mechanical, electrical and thermal considerations. Engineers also need to know when a model is operating within its validated range.

Ferguson framed the coordination issue more broadly. A change in material chemistry may be developed by one group while another team analyzes thermal behavior. If those efforts do not inform each other in time, the combined design may fail to fit together. The industry needs better ways to coordinate changes across the ecosystem, he argued, and intelligent agents could help teams share and act on that context. He also cautioned that people will still need to identify and build the right tools.

Mueth said recent AI progress has made more engineering workflows practical than he expected, including experiments at a company hackathon. Customers will still need to define the problems they want to solve and direct how tools are orchestrated. The value of AI here is not simply producing an answer; it is making cross-domain analysis easier to initiate and repeat.

More compute can help simulation and create new trade-offs

AI workloads may use CPUs, GPUs and other accelerators, adding complexity to a system’s thermal profile. Mueth described the design choice as a balance: combining technologies can complicate integration, but using the right processor for each task may improve electrical and thermal efficiency. Berg likewise said multiple options for training and inference can help with effectiveness and cost.

Accelerators also have a role in the design process itself. Lin said conventional EDA workflows often rely on CPU-based acceleration, while multiphysics simulation can benefit from GPUs because parts of the three-dimensional calculations can be parallelized. In the scenario he described, thousands of GPUs could work on partitioned portions of a 3D-IC design. CPUs would coordinate the workload and handle some reasoning.

Large GPU clusters could also generate synthetic data from coupled physics solvers. Berg said that data could support surrogate models that run on CPUs, including on an engineer’s workstation, for quick “what if” checks. But those models are only useful if the underlying multiphysics simulations are calibrated against data and the model’s boundaries are clear. Interpolation within a known range is different from extrapolating beyond it; teams need to understand which one they are doing.

The direction is clear, even if the timing and cost of each step remain uncertain. Vertical stacks, mixed technologies and higher power make thermal behavior inseparable from electrical and mechanical design. The next useful gains will depend on validated coupled simulations, materials and cooling choices that fit specific applications, and workflows that let teams test the full system before late-stage integration reveals a mismatch.